Introduction to VLSI:
Evolution, Applications, Future, Processor Based Systems, FPGA Based Systems ,Digital System Design Using FPGAs, ASIC vs. FPGA vs. CPLD, Introduction to HDL languages, VHDL VS VERILOG,
Digital Electronics:
Introduction, Number systems, Code conversions, Arithmetic’s, Boolean algebra, Logic gates. MOS, CMOS, Bi CMOS Technology trends and projections.
Combinational logic design:
Standard representation of logical functions, Karnaugh map method, MSI circuits, Multiplexers/demultiplexers, Adders / sub tractors, Arithmetic Logic Unit (ALU), Encoders/ Decoders.
Flip Flops:
Flip-flops, Type of Flip flops, Conversion of flip flops, Application of flip flops.
Sequential circuit design:
Registers, Types of shift registers, Application of registers, Counters, Ripple or Asynchronous counters, Synchronous counters, Clocked sequential circuits.
Designing of Memories:
Introduction, Memory Organization and operation, expanding memory size, Expanding memory capacity, Different types of memories.
Programmable Logic devices:
Introduction, Programmable logic array (PLAs), Programmable array logic (PALs), Complex programmable logic devices (CPLDs), Field programmable gate array (FPGA), Computer-Aided Design Tools (CAD).
Design and synthesis by using Verilog HDL
Introduction to Verilog HDL:
Typical Design flow, Importance of HDL’s, Popularity of Verilog HDL.
Modeling Concepts:
Design methodologies, Module concept, types of modeling.
Basic Concepts:
Lexical Conventions, Number Specifications, Strings, Data Types, System Task, Compiler Directives.
Modules: List of Ports, Port Declaration, Port Connection Pins.
Gate Level Modeling:
Different Types of Gates, Gate Delays.
Data Flow modeling:
Continuous Assignments, Delays, Expression Operators, Operators Types.
Behavioral Modeling:
Structured Procedures, Initial Statement, Always Statement, Event- Base Timing Control
Conditional Statements, If Statements, Case Statements, Loop Statements.
Structural Modeling:
component instantiation, Interfacing of sub modules.
FSM Modeling:
Types of FSMs, Moore FSM, Melay FSM, Controller Development, Sequence Detectors.
Task and Functions:
Different between Task and Function, Function, Task.
Memory Modeling:
RAM, ROM, LUT.
Switch Level modeling (optional):
nmos, pmos, cmos, combinational circuit design with cmos, Sequential circuit design with cmos.
Test Bench:
Modeling a Test Bench, Test Bench for Combinational Circuits, Test Bench for Sequential Circuits, Test Bench for Memories Circuits, Test Bench for Controllers.
Design and synthesis by using VHDL:
Introduction to VHDL:
Introduction to VHDL, Code structure, Library Functions, Entity, Architecture, Configuration Declaration, and Package Declaration.
Elements of VHDL LANGUAGES:
Different Data types, Operators, Attributes, Generic, Identifiers, and Variables Signals.
Different types of VHDL Modeling:
Behavioral modeling, Modeling techniques, If statement, Case statement, Wait statement, Loop statement, Process statement.
Data flow modeling:
When statements, Block statement, Generate statement.
Structural Modeling:
Component declaration, Component instantiation.
FSM Modeling:
Types of FSMs, Moore FSM, Melay FSM, Controller Development, Sequence Detectors.
Memory Modeling:
RAM, ROM, LUT.
Test Bench:
Modeling a Test Bench, Test Bench for Combinational Circuits, Test Bench for Sequential Circuits, Test Bench for Memories Circuits, Test Bench for Controllers.
Labs:
Introduction to XILINX tools, Entering HDL code, Synthesis and implementation, Creating Test Bench, Simulation, Physical Realization.
ABOUT PROJECT:
Project Basics, Module Explanation, Presentation basics, Report preparation guide lines.